Design and Verification of Microprocessor Systems for High-Assurance Applications

ISBN-13: 9781489984593 / Angielski / Miękka / 2014 / 436 str.

David S Hardin

Opis

Microprocessors increasingly control and monitor our most critical systems, including automobiles, airliners, medical systems, transportation grids, and defense systems. The relentless march of semiconductor process technology has given engineers exponentially increasing transistor budgets at constant recurring cost. This has encouraged increased functional integration onto a single die, as well as increased architectural sophistication of the functional units themselves. Additionally, design cycle times are decreasing, thus putting increased schedule pressure on engineers. Not surprisingly, this environment has led to a number of uncaught design flaws. Traditional simulation-based design verification has not kept up with the scale or pace of modern microprocessor system design. Formal verification methods offer the promise of improved bug-finding capability, as well as the ability to establish functional correctness of a detailed design relative to a high-level specification. However, widespread use of formal methods has had to await breakthroughs in automated reasoning, integration with engineering design languages and processes, scalability, and usability. This book presents several breakthrough design and verification techniques that allow these powerful formal methods to be employed in the real world of high-assurance microprocessor system design.

Spis treści

ACL2 and Its Applications to Digital System Verification.- A Mechanically Verified Commercial SRT Divider.- Use of Formal Verification at Centaur Technology.- Designing Tunable, Verifiable Cryptographic Hardware Using Cryptol.- Verifying Pipelines with BAT.- Formal Verification of Partition Management for the AAMP7G Microprocessor.- Compiling Higher Order Logic by Proof.- Specification and Verification of ARM Hardware and Software.- Information Security Modeling and Analysis.- Modeling and Security Analysis of a Commercial Real-Time Operating System Kernel.- Refinement in the Formal Verification of the seL4 Microkernel.- Specification and Checking of Software Contracts for Conditional Information Flow.- Model Checking Information Flow.

Blurb

Design and Verification of Microprocessor Systems for High-Assurance Applications

Edited by:

David S. Hardin

This book examines several leading-edge design and verification technologies that have been successfully applied to microprocessor systems  for high-assurance applications at various levels – from arithmetic circuits to microcode to instruction sets to operating systems to applications. We focus on recent hardware, software, and system designs that have actually been built and deployed, and feature systems that have been certified at high Evaluation Assurance Levels, namely the Rockwell Collins AAMP7G microprocessor (EAL7) and the Green Hills INTEGRITY-178B separation kernel (EAL6+). The contributing authors to this book have endeavored to bring forth truly new material on significant, modern design and verification efforts; many of the results described herein were obtained only within the past year.

• Offers practical case studies of the successful application of formal methods at several different levels of real-world microprocessor system design;
• Discusses high-robustness design techniques that support formal verification;
• Shows how "Design for Verification" can become "Design with Verification", using modern verification tool suites that can readily import engineering designs;
• Features chapters written by practitioners who have achieved the highest assurance Evaluation Assurance Level (EAL) certifications defined by the Common Criteria;
• Formally develops the "GWV" family of information flow theorems used in recent EAL6+ and EAL7 certifications;
• Explains how designs expressed in new model-based development languages can be analyzed and verified;
• Demonstrates ways in which various kinds of formal verification tools can be utilized in combination to achieve a final verification result.