Design Automation for Differential Mos Current-Mode Logic Circuits

ISBN-13: 9783319913063 / Angielski / Twarda / 2018 / 233 str.

Stephane Badel; Can Baltaci; Alessandro Cevrero

Opis

This book discusses the implementation of digital circuits by using MCML gates. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML.

Spis treści

Introduction.- Analysis of MOS Current-Mode Logic Circuits.- Design of MOS Current-Mode Logic Cells.- Design Methodology for MCML Standard Cells.- Design Automation for Differential Circuits.- Design Example I : Low-Noise Encoder Circuit for A/D Converter.- Design Example II : High-Speed Multiplexer.- Design Example III : Grain-128a Stream Cipher.- Design Example IV: DPA Resistant Processor.

O autorze

Stéphane Badel has received his Electrical Engineering degree from Ecole d'ingénieurs de Genève in 1999, his M.Sc. degree from Swiss Federal Institute of Technology in Lausanne (EPFL) in 2003, and his Ph.D. degree also from EPFL in 2008. He has worked as mixed-signal design engineer at Icera Semiconductor, and at NVIDIA. Currently, he is working as a Physical Design Engineer at Huawei Technologies.

 

Can Baltacı received the B.S. degree in Electronics Engineering from Middle East Technical University, Ankara, Turkey and M.S. degree in Electrical Engineering from Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland in 2010 and 2013, respectively. He is currently studying towards his PhD degree at the Swiss Federal Institute of Technology in Lausanne (EPFL). His research interests include self-heating effects in high performance analog and digital circuits implemented in bulk and FDSOI.

 

Alessandro Cevrero received the M.Sc. degree in nanotechnology and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology, Lausanne, Switzerland, in 2007 and 2014, respectively. In 2012, he joined IBM Research—Zurich, Rüschlikon, Switzerland, where he has been involved in analog circuit design and silicon validation of high-speed energy-efficient I/O links in advanced CMOS technologies. His current research interests include high-speed analog circuit design, 3-D integration, and semiconductor manufacturing. In these areas, he has authored or co-authored over 35 technical publications.

 

Yusuf Leblebici received his B.Sc. and M.Sc. degrees in electrical engineering from Istanbul Technical University, in 1984 and in 1986, respectively, and his Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign (UIUC) in 1990. Since 2002, Dr. Leblebici is a Chair Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), and Director of Microelectronic Systems Laboratory. His research interests include design of high-speed CMOS digital and mixed-signal integrated circuits, computer-aided design of VLSI systems, intelligent sensor interfaces, modelling and simulation of semiconductor devices, and VLSI reliability analysis. He is the coauthor of 6 textbooks, as well as more than 300 articles published in various journals and conferences. He has served as an Associate Editor of IEEE Transactions on Circuits and Systems (II), and IEEE Transactions on Very Large Scale Integrated (VLSI) Systems. He has also served as the general co-chair of the 2006 European Solid-State Circuits Conference, and the 2006 European Solid State Device Research Conference (ESSCIRC/ESSDERC). He is a Fellow of IEEE and has been elected as Distinguished Lecturer of the IEEE Circuits and Systems Society for 2010-2011.

Blurb

This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML.  A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.