Cryptosystem execution of VLSI signed RNS multipliers

ISBN-13: 9786206173366 / Angielski / Miękka / 96 str.

Debasis Mukherjee

Opis

This book explores the VLSI implementation of signed Residue Number System (RNS) multipliers for efficient and secure cryptographic operations. It covers topics such as the background, objectives, and motivations for the research. The book provides an overview of VLSI implementation for cryptosystems, delves into the properties and advantages of RNS, and discusses moduli selection techniques. It explores conversion techniques for signed numbers to RNS representation and highlights the importance of efficient multiplication in cryptosystems. The book compares different multiplication techniques and analyzes their performance. It discusses VLSI design techniques for signed RNS multipliers, including parallelism, hardware acceleration, and error detection. The trade-offs between speed, resource utilization, and power consumption are examined. The book presents case studies, comparative analysis, and real-world applications of signed RNS multipliers. It discusses performance metrics, evaluation techniques, and future directions in VLSI technology for cryptographic systems. The book concludes by summarizing key findings and contributions.

O autorze

With regards to mother late Sabita Mukherjee and father late Sukumar Mukherjee. Dr. Debasis Mukherjee completed his B.E. degree in EIE from BUIE/Burdwan University in 2003 and M.Tech in VLSI Design from CDAC Noida/GGSIPU in 2008. He obtained a Ph.D. degree in ECE from GGSIPU in 2019. Presently he is an associate professor at Brainware University.