CTL for Test Information of Digital ICS

ISBN-13: 9781475778007 / Angielski / Miękka / 2013 / 173 str.

Rohit Kapur

Opis

From the reviews: " ...] a welcome addition to the literature. ...] This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields." Microelectronics Reliability

Recenzje

From the reviews:

"The book is a welcome addition to the literature. It is definitely useful as a reference for anyone who is interested in creating test programs for SoC designs. This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields."
(Microelectronics Reliability, 43 (2003)

"CTL for test information of Digital ICs will have significant impact and will be accessible to anyone who is interested in testing integrated circuits. The contents of this book are especially relevant to the segment of the industry that is developing cores and/or using cores in system-on-chip methodologies. The author has done an excellent job. It is a pleasure to read and consult a book that tries to promote understanding, not just coverage. Indeed a stimulating book ... ." (Current Engineering Practice, Vol. 47, 2002-2003)

Spis treści

1. Hello CTL. 2. Uses of CTL. 3. Design Philosophy of CTL. 4. Simplified View of CTL. 5. CTL Syntax and Semantics: Design Entities. 6. CTL Syntax and Semantics: Top Level View. 7. CTL Syntax and Semantics: Test Mode Constructs in the Environment. 8. CTL Syntax and Semantics: Shortcuts. 9. Examples Describing Test Information in CTL.