CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design

ISBN-13: 9789400787261 / Angielski / Miękka / 2014 / 299 str.

Rocio Rio Fernandez; Fernando Medeiro Hidalgo; Belen Perez Verdu

Opis

CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design presents architectures, circuits, models, methods and practical considerations for the design of high-performance low-pass switched-capacitor (SC) sigma-delta A/D interfaces for mixed-signal CMOS ASICs. Main focus is on cascade architectures, although considerations pertaining to circuits and error analysis are general and hence valid for other architectures. The book differs from others in the complete, in-depth coverage of SC circuit errors, in the detailed elaboration and description of practical design plan, and in the thorough presentation of considerations leading to practical high-performance designs. Another differentiating feature of this book is the coverage into a unified description of largely different application areas. On the one hand, sensor front-ends, where the limiting factor is thermal noise. On the other, wire-line telecom front-ends, where the limiting factor is linked to the dynamic behavior of the building blocks. The book starts with a tutorial presentation of the fundamentals of low-pass sigma-delta modulators, their applications, and their most common architectures. This presentation is both complete and comprehensive. It then presents an exhaustive analysis of SC circuit errors with a twofold outcome. On the one hand, compact expressions are derived to support design plans and quick top-down design. On the other, detailed behavioral models are presented to support accurate verification. This set of models allow the designer to determine the required specifications for the different modulator building blocks and form the basis of a systematic design approach. The book is completed in subsequent chapters with the detailed presentation of three high-performance modulator ICs: the first two are intended for DSL-like applications, whereas the third one is intended for automotive sensors. CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design contains highly valuable information that is structured to give the reader the necessary insight on how to design SC sigma-delta modulators. In this sense, the book is intended for a large audience: from mixed-signal designers who want to optimize and to shorten the design cycle of sigma-delta modulators with challenging specifications, to non-experienced readers who want a comprehensive and practical description of sigma-delta design and SC errors.

Spis treści

List of Abbreviations. Preface. CHAPTER 1 - SD ADCs: Principles, Architectures, and State of the Art. 1.1. Analog-to-Digital Conversion: Fundamentals. 1.2. Oversampling SD ADCs: Fundamentals. 1.3. Single-Loop SD Architectures. 1.4. Cascade SD Architectures. 1.5. Multi-Bit SD Architectures. 1.6. Parallel SD Architectures. 1.7. State of the Art in SD ADCs. 1.8. Summary. CHAPTER 2 - Non-Ideal Performance of SD Modulators. 2.1. Integrator Leakage. 2.1.1. Single-loop SD modulators. 2.1.2. Cascade SD modulators. 2.2. Capacitor Mismatch. 2.3. Integrator Settling Error. 2.4. Circuit Noise. 2.5. Clock Jitter. 2.6. Sources of Distortion. 2.7. Summary. CHAPTER 3 - A Wideband SD Modulator in 3.3-V 0.35-um CMOS. 3.1. Design Methodology. 3.2. Topology Selection. 3.3. Switched-Capacitor Implementation. 3.4. Specifications for the Building Blocks. 3.5. Design of the Building Blocks. 3.6. Layout and Prototyping. 3.7. Experimental Results. 3.8. Performance Summary. 3.9. Performance Comparison with the State of the Art. 3.10. Summary. CHAPTER 4 - A SD Modulator in 2.5-V 0.25-um CMOS for ADSL/ADSL+. 4.1. Topology Selection. 4.2. Switched-Capacitor Implementation. 4.3. Specifications for the Building Blocks. 4.4. Design of the Building Blocks. 4.5. Layout and Prototyping. 4.6. Experimental Results. 4.7. Performance Summary. 4.8. Performance Comparison with the State of the Art. 4.9. Summary. CHAPTER 5 - A SD Modulator with Programmable Signal Gain for Automotive Sensor Interfaces. 5.1. Basic Design Considerations. 5.2. Architecture Selection and High-Level Sizing. 5.3. Design of the Building Blocks. 5.4. Layout and Prototyping. 5.5. Experimental Results. 5.6. Summary. APPENDIX A - An Expandible Family of Cascade SD Modulators. A.1. Topology Description. A.2. Non-Ideal Performance. APPENDIX B - Power Estimator for Cascade SD Modulators. B.1. Dominant Error Mechanisms. B.2. Estimation of Power Consumption. References.