Architecture-Aware Optimization Strategies in Real-Time Image Processing

ISBN-13: 9781786300942 / Angielski / Twarda / 2017 / 180 str.

Yang, Fan; Balla–Arabe, Souleymane; Li, Chao

Opis

This book is composed of 6 chapters from the fundamental concept introduction of the real-time image processing to future perspectives in this area. We describe hardware architectures and different optimization strategies for real-time purpose. The latter consists in a survey of software and hardware co-design tools at different levels. Two real-time applications will be presented in detail in order to illustrate the proposed approaches. Recently, the real-time image processing field has made a lot of progress. Technology evolution allows engineers to integrate more complex algorithms with large data volume onto embedded systems, and produce series of new sophisticated electronic architectures at an affordable price. At the same time, industrial and academic researchers propose new methods and provide new tools in order to facilitate real-time image processing realization at different levels. It is necessary to perform a deep evaluation of this topic. We describe hardware architectures and different optimization strategies for real-time purpose. The latter consists of a survey of software and hardware co-design tools at different levels. Two real-time image processing applications will be presented in detail in order to illustrate the proposed approaches. The major originalities of this book include: a). Algorithm Architecture mapping: we select methods and tools which treat each application simultaneously and its electronic platform in order to perform fast and optimal DSE (Design Space Exploration), b). Each approach will be illustrated by concrete examples, and c). Two chosen algorithms consist of recent advances in their domain.

Spis treści

1. Introduction of Real–time Image Processing.

2. Hardware Architectures for Real–time Processing.

3. Rapid Prototyping of Parallel Reconfigurable Instruction Set Processor for Efficient Real–Time Image Processing.

4. Exploration of High–Level Synthesis Technique.

5. CDMS4HLS: A Novel Source– To–Source Compilation Strategy for HLS–Based FPGA Design.

6. Embedded Implementation of VHR Satellite Image Segmentation.

7. Real–time Image Processing with Very High–level Synthesis.