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Advances in Design Methods from Modeling Languages for Embedded Systems and Soc's: Selected Contributions on Specification, Design, and Verification f

ISBN-13: 9789048193035 / Angielski / Twarda / 2010 / 248 str.

Dominique Borrione
Advances in Design Methods from Modeling Languages for Embedded Systems and Soc's: Selected Contributions on Specification, Design, and Verification f Borrione, Dominique 9789048193035 Springer - książkaWidoczna okładka, to zdjęcie poglądowe, a rzeczywista szata graficzna może różnić się od prezentowanej.

Advances in Design Methods from Modeling Languages for Embedded Systems and Soc's: Selected Contributions on Specification, Design, and Verification f

ISBN-13: 9789048193035 / Angielski / Twarda / 2010 / 248 str.

Dominique Borrione
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More than ever, FDL is the place for researchers, developers, industry designers, academia, and EDA tool companies to present and to learn about the latest scientific achievements, practical applications and users experiences in the domain of specification and design languages. FDL covers the modeling and design methods, and their latest supporting tools, for complex embedded systems, systems on chip, and heterogeneous systems.

FDL 2009 is the twelfth in a series of events that were held all over Europe, in selected locations renowned for their Universities and Reseach Institutions as well as the importance of their industrial environment in Computer Science and Micro-electronics. In 2009, FDL was organized in the attractive south of France area of Sophia Antipolis. together with the DASIP (Design and Architectures for Signal and Image Processing) Conference and the SAME (Sophia Antipolis MicroElectronics ) Forum.

All submitted papers were carefully reviewed to build a program with 27 full and 10 short contributions. From these, the Program Committee selected a shorter list, based on the evaluations of the reviewers, and the originality and relevance of the work that was presented at the Forum. The revised, and sometimes extended versions of these contributions constitute the chapters of this volume.

Advances in Design Methods from Modeling Languages for Embedded Systems and SoC's presents extensions to standard specification and description languages, as well as new language-based design techniques and methodologies to solve the challenges raised by mixed signal and multi-processor systems on a chip. It is intended as a reference for researchers and lecturers, as well as a state of the art milestone for designers and CAD developers.

Kategorie:
Technologie
Kategorie BISAC:
Computers > Languages - General
Technology & Engineering > Electronics - Circuits - General
Computers > Programming - Compilers
Wydawca:
Springer
Seria wydawnicza:
Lecture Notes in Electrical Engineering
Język:
Angielski
ISBN-13:
9789048193035
Rok wydania:
2010
Wydanie:
2010
Numer serii:
000367340
Ilość stron:
248
Waga:
0.53 kg
Wymiary:
23.39 x 15.6 x 1.6
Oprawa:
Twarda
Wolumenów:
01
Dodatkowe informacje:
Wydanie ilustrowane

Part I UML and MDE for Embedded Systems. IP-XACT components with Abstract Time Characterization; Frédéric Mallet, Charles André and Robert de Simone. MDE Support for HW/SW Codesign: a UML-based Design Flow; Luis Gabriel Murillo, Marcello Mura and Mauro Prevostini Part II C/C++-Based System Design. Checkpoint and Restore for SystemC Models; Màrius Montón, et al. Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs; Martin Streubühr, et al. Fast SystemC Performance Models For The Exploration Of Embedded Memories; Hans-Peter Loeb and Christian Sauer. Another take on functional system-level design and modeling; Tomasz Toczek, et al. Generic Model for Application-Specific Processors on Reconfigurable Fabric; Arda Yurdakul, et al. A SystemC Superset for High-Level Synthesis; Maxim Smirnov and Andres Takach. Part III Embedded Analog and Mixed-Signal System Design. Design of Experiments for Effective Pre-silicon Verification of Automotive Electronics; Monica Rafaila, et al. A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems; Torsten Maehne, et al. Part IV Assertion Based Design, Verification & Debug. High Level Synthesis Using Operation Properties; Jan Langer and Ulrich Heinkel. A Re-Use Methodology for Formal SoC Protocol Compliance Verification; Minh D. Nguyen, et al. ISIS: Runtime Verification of TLM Platforms; Luca Ferro and Laurence Pierre. SMT-based Stimuli Generation in the SystemC Verification Library; Robert Wille, et al.

More than ever, FDL is the place for researchers, developers, industry designers, academia, and EDA tool companies to present and to learn about the latest scientific achievements, practical applications and users experiences in the domain of specification and design languages. FDL covers the modeling and design methods, and their latest supporting tools, for complex embedded systems, systems on chip, and heterogeneous systems.

FDL 2009 is the twelfth in a series of events that were held all over Europe, in selected locations renowned for their Universities and Reseach Institutions as well as the importance of their industrial environment in Computer Science and Micro-electronics. In 2009, FDL was organized in the attractive south of France area of Sophia Antipolis. together with the DASIP (Design and Architectures for Signal and Image Processing) Conference and the SAME (Sophia Antipolis MicroElectronics ) Forum.

All submitted papers were carefully reviewed to build a program with 27 full and 10 short contributions. From these, the Program Committee selected a shorter list, based on the evaluations of the reviewers, and the originality and relevance of the work that was presented at the Forum. The revised, and sometimes extended versions of these contributions constitute the chapters of this volume.

Advances in Design Methods from Modeling Languages for Embedded Systems and SoC’s presents extensions to standard specification and description languages, as well as new language-based design techniques and methodologies to solve the challenges raised by mixed signal and multi-processor systems on a chip. It is intended as a reference for researchers and lecturers, as well as a state of the art milestone for designers and CAD developers.



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