Adaptive Analog VLSI Neural Systems

ISBN-13: 9780412616303 / Angielski / Miękka / 1995 / 262 str.

M. Jardi; M. A. Jabri; R. J. Coggins

Opis

amplitude ---. -----. -----. -----, -----. -----, -, VfT: j." 4. 50 4. 00 3. 50 q . 3. 00 /'. -'": . 2. 50: . . . 1 -. i "'" " 2. 00 1. 50 ..GO..O_O_, -. . . . &., .; D Q . " . . . / 1. 00 0. 50 0. 00 L. -----1. . ---. . l. -----: -::: ''":: -:: --:: -:: -'-::: -:: ------=--:: -'-:: -: =---=-=""=_: ' 5. 00 10. 00 15. 00 Figure 7. 1 The morphology of ST and VT retrograde 1:1. (c) 1995 IEEE Coggins, labri, Flower and Pickard ]. ing to the analog domain. Additionally, the use of differential pair multipliers and current node summing in the network allows a min imum of devices in the network itself and hence associated savings in power and area. However, in the last few decades analog signal processing has been used sparingly due to the effects of device off sets, noise and drift*. The neural network architecture alleviates these problems to a large extent due to the fact that it is both highly parallel and adaptive. The fact that the network is trained to recognize morphologies with the analog circuits in-loop means that the synaptic weights can be adapted to cancel device offsets Castro, Tam and Holler (1993); Castro and Sweet (1993)]. The impact of local un correlated noise is reduced by the parallelism of * Most fabrication processes have been optimised for digital design techniques which results in poor analog performa

Spis treści

1 Overview.- Book roadmap.- Acknowledgements.- 2 Introduction to neural computing.- 2.1 Introduction.- 2.2 Framework.- 2.3 Learning.- 2.4 Perceptrons.- 2.5 The Multi-Layer Perceptron.- 2.6 The back-propagation algorithm.- 2.7 Comments.- 3 MOS devices and circuits.- 3.1 Introduction.- 3.2 Basic properties of MOS devices.- 3.3 Conduction in MOSFETs.- 3.4 Complementary MOSFETs.- 3.5 Noise in MOSFETs.- 3.6 Circuit models of MOSFETs.- 3.7 Simple CMOS amplifiers.- 3.8 Multistage op amps.- 3.9 Choice of amplifiers.- 3.10 Data converters.- 4 Analog VLSI building blocks.- 4.1 Functional designs to architectures.- 4.2 Neurons and synapses.- 4.3 Layout strategies.- 4.4 Simulation strategies.- 5 Kakadu — a micropower neural network.- 5.1 Advantages of analog implementation.- 5.2 Architecture.- 5.3 Implementation.- 5.4 Chip testing.- 5.5 Discussion.- 6 Supervised learning in an analog framework.- 6.1 Introduction.- 6.2 Learning in an analog framework.- 6.3 Notation.- 6.4 Weight update strategies.- 6.5 Learning algorithms.- 6.6 Credit assignment efficiency.- 6.7 Parallelization heuristics.- 6.8 Experimental methods.- 6.9 ICEG experimental results.- 6.10 Parity 4 experimental results.- 6.11 Discussion.- 6.12 Conclusions.- 7 A micropower intracardiac electrogram classifier.- 7.1 Introduction.- 7.2 Architecture.- 7.3 Training system.- 7.4 Classification performance and power consumption.- 7.5 Discussion.- 7.6 Conclusion.- 8 On-chip perturbation based learning.- 8.1 Introduction.- 8.2 On-chip learning multi-layer perceptron.- 8.3 On-chip learning recurrent neural network.- 8.4 Conclusion.- 9 An analog memory technique.- 9.1 Introduction.- 9.2 Self-refreshing storage cells.- 9.3 Multiplying DACs.- 9.4 A/D-D/A static storage cell.- 9.5 Basic principle of the storage cell.- 9.6 Circuit limitations.- 9.7 Layout considerations.- 9.8 Simulation results.- 9.9 Discussion.- 10 Switched capacitor techniques.- 10.1 A charge-based network.- 10.2 Variable gain, linear, switched capacitor neurons.- 11 A high speed image understanding system.- 11.1 Introduction.- 11.2 The NET32K chip.- 11.3 The NET32K board system.- 11.4 Applications.- 11.5 Summary and conclusions.- 12 A Boltzmann learning system.- 12.1 Introduction.- 12.2 The Boltzmann machine.- 12.3 Deterministic learning by error propagation.- 12.4 Mean-field version of Boltzmann machine.- 12.5 Electronic implementation of a Boltzmann machine.- 12.6 Building a system using the learning chips.- 12.7 Other applications.- References.

O autorze

Marwan Jabri is a Reader, Richard Coggins is a Research Engineer and Barry Flower is a Research Fellow at SEDAL, Sydney University Electrical Engineering, Australia.

Blurb

Adaptive Analog VLSI Neural Systems is the first practical book on neural networks learning chips and systems. It covers the entire process of implementing neural networks in VLSI chips, beginning with the crucial issues of learning algorithms in an analog framework and limited precision effects, and giving actual case studies of working systems.
The approach is systems and applications oriented throughout, demonstrating the attractiveness of such an approach for applications such as adaptive pattern recognition and optical character recognition.
Dr Jabri and his co-authors from AT&T Bell Laboratories, Bellcore and the University of Sydney provide a comprehensive introduction  to VLSI neural networks suitable for research and development staff and advanced students.