ASIC Implementation of Low Power FP-AU using Reversible Logic : Floating Point (FP)-Arithmetic Units (AU)

ISBN-13: 9786139587056 / Angielski / Miękka / 2018 / 52 str.

Vijeyakumar Krishnasamy Natarajan; Kalaiselvi Sundaram; Vinoth Kumar Bojan

Opis

This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.

O autorze

Krishnasamy Natarajan, VijeyakumarDr.K.N. Vijeyakumar is working as an Associate Professor in Dr.Mahalingam College of Engineering and Technology, Coimbatore, Tamilnadu. His area of interest include ASIC design, low power VLSI design and IC fabrication. He has published more than 25 research papers in reputed international journals.