ADVANCED DATA PREFETCHING DESIGN FOR MODERN PROCESSORS : PREFETCHING REGULAR STREAM, LINKED DATA STRUCTURE, AND CORRELATED MISS PATTERN

ISBN-13: 9783844396836 / Angielski / Miękka / 2011 / 84 str.

Gang Liu

Opis

Ever since computer is invented, more powerful software have been developed, such as amazing PC applications, multithreading programs running in servers of major web sites, etc. These powerful software push hardware especially processor design to limit. Processor cache is key to system performance. Unlike hard drive and DRAM, which have seen quick growth in capacity in recent years, processor caches remain as several MBs due to expensive cost. Software are generally hurt by small cache size because of high cache miss rate. Data prefetching is a mechanism to efficiently reduce cache miss rate thus improve system performance. This book will give a complete introduction to data prefetching for processors, detailed analysis of cache miss pattern of modern benchmarks, and describe innovative, advanced data prefetching designs.

O autorze

Gang Liu obtained his B.E. from Tsinghua University in 2000, M.E. from Chinese Academy of Sciences in 2003, and Ph.D. from University of Florida in 2010. He now works for Google, and resides in California, USA.