A parallel Architecture for Motion Estimation using H.264/AVC standard : Motion Estimation Implementation

ISBN-13: 9783639166989 / Angielski / Miękka / 2010 / 244 str.

Rohit Nayak; Ying Chen

Opis

Motion Estimation Architecture for parallel execution using FPGA based systems. A novel architecture proposed reduces execution time and improves throughput for Motion Estimation. This Architecture is verifed experimentally on a Xilinx based FPGA system. This was a result of ongoing research project at San Francisco State University California and a thesis for my Masters Degree in Elecrical Engineering.