A Fast Feedback Control System Using FPGA for RF Signals » książka
A Fast Feedback Control System Using FPGA for RF Signals
ISBN-13: 9783659216770 / Angielski / Miękka / 2013 / 96 str.
In accelerators, RF system is required to produce electromagnetic fields in accelerating structures that interact with charged particles and accelerate them. The performance of an accelerator depends on the stability of the RF field inside the cavity. The stability of the RF field inside the cavity is strongly affected by interfering noise and non-linear effect of active components of the entire RF amplifier chain feeding power to the RF cavity and also on the beam loading. For proper operation of the machine, amplitude and phase of the accelerating fields should be very stable (within 1% in amplitude and 1 in phase) and is achieved by low level RF feedback (LLRF) system. After achievement of desired performance from the developed digital fast feedback control system using FPGA, rapid prototyping capabilities of FPGA was highly appreciated and as time required for any digital logic development using FPGA is very less, it was proposed to develop a FPGA based frequency tuning loop for Indus machine.
In accelerators, RF system is required to produce electromagnetic fields in accelerating structures that interact with charged particles and accelerate them. The performance of an accelerator depends on the stability of the RF field inside the cavity. The stability of the RF field inside the cavity is strongly affected by interfering noise and non-linear effect of active components of the entire RF amplifier chain feeding power to the RF cavity and also on the beam loading. For proper operation of the machine, amplitude and phase of the accelerating fields should be very stable (within 1% in amplitude and 1° in phase) and is achieved by low level RF feedback (LLRF) system. After achievement of desired performance from the developed digital fast feedback control system using FPGA, rapid prototyping capabilities of FPGA was highly appreciated and as time required for any digital logic development using FPGA is very less, it was proposed to develop a FPGA based frequency tuning loop for Indus machine.
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