Origin of Power Converters: Decoding, Synthesizing, and Modeling

ISBN-13: 9781119632986 / Angielski / Twarda / 2020 / 416 str.

Tsai-Fu Wu; Yu-Kai Chen

Spis treści

Preface xvAcknowledgments xviiAbout the Authors xviiiPart I Decoding and Synthesizing 11 Introduction 31.1 Power Processing Systems 41.2 Non-PWM Converters Versus PWM Converters 71.2.1 Non-PWM Converters 71.2.2 PWM Power Converters 91.3 Well-Known PWM Converters 101.4 Approaches to Converter Development 171.5 Evolution 251.6 About the Text 261.6.1 Part I: Decoding and Synthesizing 261.6.2 Part II: Modeling and Applications 28Further Reading 282 Discovery of Original Converter 312.1 Creation of Original Converter 312.1.1 Source-Load Approach 322.1.2 Proton-Neutron-Meson Analogy 322.1.3 Resonance Approach 332.2 Fundamental PWM Converters 342.2.1 Voltage Transfer Ratios 352.2.2 CCM Operation 362.2.3 DCM Operation 382.2.4 Inverse Operation 392.3 Duality 40Further Reading 413 Fundamentals 433.1 DC Voltage and Current Offsetting 433.1.1 DC Voltage Offsetting 443.1.2 DC Current Offsetting 473.2 Capacitor and Inductor Splitting 493.3 DC-Voltage Blocking and Pulsating-Voltage Filtering 513.4 Magnetic Coupling 553.5 DC Transformer 583.6 Switch Grafting 623.7 Diode Grafting 673.8 Layer Scheme 72Further Reading 744 Decoding Process 774.1 Transfer Ratios (Codes) 774.2 Transfer Code Configurations 824.2.1 Cascade Configuration 824.2.2 Feedback Configuration 824.2.3 Feedforward Configuration 834.2.4 Parallel Configuration 854.3 Decoding Approaches 864.3.1 Factorization 864.3.2 Long Division 884.3.3 Cross Multiplication 894.4 Decoding of Transfer Codes with Multivariables 914.5 Decoding with Component-Interconnected Expression 93Further Reading 945 Synthesizing Process with Graft Scheme 955.1 Cell Approaches 955.1.1 P-Cell and N-Cell 965.1.2 Tee Canonical Cell and Pi Canonical Cell 975.1.3 Switched-Capacitor Cell and Switched-Inductor Cell 985.1.4 Inductor-Capacitor Component Cells 1005.2 Converter Grafting Scheme 1015.2.1 Synchronous Switch Operation 1015.2.2 Grafting Active Switches 1035.2.3 Grafting Passive Switches 1085.3 Illustration of Grafting Converters 1105.3.1 Grafting the Well-Known PWM Converters 1105.3.1.1 Graft Boost on Buck 1115.3.1.2 Graft Buck on Boost 1125.3.1.3 Graft Buck on Buck-Boost 1145.3.1.4 Graft Boost on Boost-Buck 1165.3.1.5 Buck in Parallel with Buck-Boost 1195.3.1.6 Grafting Buck on Buck to Achieve High Step-Down Voltage Conversion 1195.3.1.7 Grafting Boost on Boost to Achieve High Step-up Voltage Conversion 1205.3.1.8 Grafting Boost (CCM) on Buck (DCM) 1215.3.1.9 Cascode Complementary Zeta with Buck 1235.3.2 Grafting Various Types of Converters 1245.3.2.1 Grafting Half-Bridge Resonant Inverter on Dither Boost Converter 1245.3.2.2 Grafting Half-Bridge Resonant Inverter on Bidirectional Flyback Converter 1245.3.2.3 Grafting Class-E Converter on Boost Converter 1255.3.3 Integrating Converters with Active and Passive Grafted Switches 1275.3.3.1 Grafting Buck on Boost with Grafted Diode 1285.3.3.2 Grafting Half-Bridge Inverter on Interleaved Boost Converters in DCM 1285.3.3.3 Grafting N-Converters with TGS 1305.3.3.4 Grafting N-Converters with PiGS 130Further Reading 1326 Synthesizing Process with Layer Scheme 1336.1 Converter Layering Scheme 1336.2 Illustration of Layering Converters 1356.2.1 Buck Family 1356.2.2 Boost Family 1386.2.3 Other Converter Examples 1426.3 Discussion 1466.3.1 Deduction from uk to Buck-Boost 1466.3.2 Deduction from Sepic to Buck-Boost 1486.3.3 Deduction from Zeta to Buck-Boost 1496.3.4 Deduction from Sepic to Zeta 150Further Reading 1517 Converter Derivation with the Fundamentals 1537.1 Derivation of Buck Converter 1537.1.1 Synthesizing with Buck-Boost Converter 1547.1.2 Synthesizing with uk Converter 1547.2 Derivation of z-Source Converters 1547.2.1 Voltage-Fed z-Source Converters 1557.2.1.1 Synthesizing with Sepic Converter 1577.2.1.2 Synthesizing with Zeta Converter 1607.2.2 Current-Fed z-Source Converters 1617.2.2.1 Synthesizing with SEPIC Converter 1627.2.2.2 Synthesizing with Zeta Converter 1627.2.3 Quasi-z-Source Converter 1627.2.3.1 Synthesizing with Sepic Converter 1647.2.3.2 Synthesizing with Zeta Converter 1657.3 Derivation of Converters with Switched Inductor or Switched Capacitor 1667.3.1 Switched-Inductor Converters 1677.3.1.1 High Step-Down Converter with Transfer Code D/(2 . D) 1677.3.1.2 High Step-Down Converter with Transfer Code D/(2(1 . D)) 1737.3.2 Switched-Capacitor Converters 1787.3.2.1 High Step-Up Converter with Transfer Code (1 + D)/(1 . D) 1787.3.2.2 High Step-Up Converter with Transfer Code 2D/(1 . D) 1817.3.2.3 High Step-Up Converter with Transfer Code D/(1 . 2D) 1847.4 Syntheses of Desired Transfer Codes 1857.4.1 Synthesis of Transfer Code: D²/(D² . 3D + 2) 1867.4.1.1 Synthesizing with Buck-Boost Converter 1877.4.1.2 Synthesizing with Zeta Converter 1887.4.1.3 Synthesizing with uk Converter 1897.4.2 Synthesizing Converters with the Fundamentals 1917.4.2.1 DC Voltage and DC Current Offsetting 1917.4.2.2 Inductor and Capacitor Splitting 1927.4.2.3 DC Voltage Blocking and Filtering 1927.4.2.4 Magnetic Coupling 1937.4.2.5 DC Transformer 1947.4.2.6 Switch and Diode Grafting 1957.4.2.7 Layer Technique 195Further Reading 1988 Synthesis of Multistage and Multilevel Converters 1998.1 Review of the Original Converter and Its Variations of Transfer Code 1998.2 Syntheses of Single-Phase Converters 2018.3 Syntheses of Three-Phase Converters 2038.4 Syntheses of Multilevel Converters 2078.5 L-C Networks 210Further Reading 2129 Synthesis of Soft-Switching PWM Converters 2159.1 Soft-Switching Cells 2159.1.1 Passive Lossless Soft-Switching Cells 2169.1.1.1 Near-Zero-Current Switching Mechanism 2169.1.1.2 Near-Zero-Voltage Switching Mechanism 2189.1.2 Active Lossless Soft-Switching Cells 2209.1.2.1 Zero-Voltage Switching Mechanism 2229.1.2.2 Zero-Current Switching Mechanism 2269.2 Synthesis of Soft-Switching PWM Converters with Graft Scheme 2309.2.1 Generation of Passive Soft-Switching PWM Converters 2309.2.2 Generation of Active Soft-Switching PWM Converters 2349.3 Synthesis of Soft-Switching PWM Converters with Layer Scheme 2409.3.1 Generation of Passive Soft-Switching PWM Converters 2409.3.2 Generation of Active Soft-Switching PWM Converters 2459.4 Discussion 247Further Reading 25110 Determination of Switch-Voltage Stresses 25510.1 Switch-Voltage Stress of the Original Converter 25510.2 Switch-Voltage Stresses of the Fundamental Converters 25710.2.1 The Six Well-Known PWM Converters 25710.2.1.1 Boost Converter 25710.2.1.2 Buck-Boost Converter 25810.2.1.3 uk, Sepic, and Zeta Converters 25910.2.2 z-Source Converters 26010.2.2.1 Voltage-Fed z-Source Converter 26010.2.2.2 Current-Fed z-Source Converter 26110.2.2.3 Quasi-z-Source Converter 26210.3 Switch-Voltage Stresses of Non-Fundamental Converters 26310.3.1 High Step-Down Switched-Inductor Converter 26310.3.2 High Step-Down/Step-Up Switched-Inductor Converter 26410.3.3 Compound Step-Down/Step-Up Switched-Capacitor Converter 26510.3.4 High Step-Down Converter with Transfer Ratio of D² 26710.3.5 High Step-Up Converter with Transfer Ratio of 1/(1 . D)² 268Further Reading 27011 Discussion and Conclusion 27111.1 Will Identical Transfer Code Yield the Same Converter Topology? 27111.2 Topological Duality Versus Circuital Duality 27411.3 Graft and Layer Schemes for Synthesizing New Fundamental Converters 27711.3.1 Synthesis of Buck-Boost Converter 27811.3.2 Synthesis of Boost-Buck (uk) Converter 27911.3.3 Synthesis of Buck-Boost-Buck (Zeta) Converter 28011.3.4 Synthesis of Boost-Buck-Boost (Sepic) Converter 28211.3.5 Synthesis of Buck-Family Converters with Layer Scheme 28411.3.6 Synthesis of Boost-Family Converters with Layer Scheme 28611.4 Analogy of Power Converters to DNA 28911.4.1 Replication 29111.4.2 Mutation 29111.5 Conclusions 295Further Reading 296Part II Modeling and Application 29912 Modeling of PWM DC/DC Converters 30112.1 Generic Modeling of the Original Converter 30212.2 Series-Shunt and Shunt-Series Pairs 30312.3 Two-Port Network 30812.4 Small-Signal Modeling of the Converters Based on Layer Scheme 31512.5 Quasi-Resonant Converters 323Further Reading 32613 Modeling of PWM DC/DC Converters Using the Graft Scheme 32913.1 Cascade Family 33013.2 Small-Signal Models of Buck-Boost and uk Converters Operated in CCM 33213.2.1 Buck-Boost Converter 33613.2.2 Boost-Buck Converter 33813.3 Small-Signal Models of Zeta and Sepic Operated in CCM 34013.3.1 Zeta Converter 34413.3.2 Sepic Converter 346Further Reading 34914 Modeling of Isolated Single-Stage Converters with High Power Factor and Fast Regulation 35114.1 Generation of Single-Stage Converters with High Power Factor and Fast Regulation 35214.2 Small-Signal Models of General Converter Forms Operated in CCM/DCM 35514.3 An Illustration Example 361Further Reading 36515 Analysis and Design of an Isolated Single-Stage Converter Achieving Power Factor Correction and Fast Regulation 36715.1 Derivation of the Single-Stage Converter 36815.1.1 Selection of Individual Semi-Stages 36915.1.2 Derivation of the Discussed Isolated Single-Stage Converter 36915.2 Analysis of the Isolated Single-Stage Converter Operated in DCM + DCM 36915.2.1 Buck-Boost Power Factor Corrector 37015.2.2 Flyback Regulator 37215.3 Design of a Peak Current Mode Controller for the ISSC 37315.4 Practical Consideration and Design Procedure 37715.4.1 Component Stress 37715.4.2 Snubber Circuit 37815.4.3 Design Procedure 37915.5 Hardware Measurements 38015.6 Design of an H¯ infinity Robust Controller for the ISSC 38215.6.1 H¯ infinity Control 38215.6.2 An Illustration Example of Robust Control and Hardware Measurements 386Further Reading 392Index 395

O autorze

Tsai-Fu Wu, PhD, is a Distinguished Professor in the Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan. Dr. Wu has been an Associate Editor for the IEEE Transactions on Power Electronics since 2000.Yu-Kai Chen, PhD, is a Professor in the Innovative Design and Energy Application Laboratory at National Formosa University, Yunlin, Taiwan.